- AMD aggressively expands into 5G virtualized infrastructure and edge deployments
- AMD Sorano now offers 84 cores for demanding telecom network workloads
- Improved LDPC decoding efficiency directly impacts overall network capacity scaling
AMD has unveiled its latest 8005 series Epyc processors, codenamed Sorano, with a clear focus on telecommunications and edge infrastructure.
The new chips increase the core count up to 84 Zen 5 cores, marking a notable jump over the previous generation Siena.
Their power consumption is up to 225 watts, although lower thermal envelopes may follow based on previous designs.
Expanding the Zen 5 Epyc line for edge workloads
Sorano is designed for virtualized radio access network deployments, where operators increasingly rely on standard server hardware rather than proprietary systems.
In this environment, both CPU performance and predictable latency are more important than maximum clock speed.
AMD says the architecture includes a full 512-bit data path for vector instructions, reflecting broader Zen 5 changes already revealed by the company.
A central claim around Sorano involves improvements in low-density parity check decoding, a central requirement in 5G networks.
According to AMD, greater efficiency in handling LDPC allows operators to free up computing capacity for additional Layer 1 and Layer 2 processing, which could translate to more network functions running per server within a data center or edge facility. The company also emphasizes energy efficiency along with higher core density.
If Sorano mirrors the lower-power variants of Siena, telecom operators may see sub-100-watt configurations for specific deployments.
In extreme scenarios, where thermal limits and environmental tolerances are stricter, the balance between performance and consumption carries financial implications.
AMD’s latest move doesn’t come in isolation. Intel continues to develop its own telecom-focused processors, including the Xeon 6E and Xeon 6 SoC lines.
The Xeon 6700E can be expanded up to 144 efficiency cores, trading advanced instruction features for density and lower power consumption.
Meanwhile, the Xeon 6 SoC integrates accelerators aimed at vRAN workloads, along with high-speed networking and support for multimedia and AI tasks often handled by a GPU in broader deployments.
Companies like Ericsson and Nokia continue to deploy Intel-based platforms in commercial networks, showing that long-term partnerships still influence acquisition decisions.
AMD will need to show measurable gains beyond core count to change entrenched relationships with suppliers.
Sorano may represent the last major Zen 5 Epyc release before the arrival of Venice, AMD’s next-generation server CPU due in 2026.
Whether this iteration materially changes the economics of telecom infrastructure remains uncertain: base increases alone rarely determine purchasing cycles in a conservative industry.
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