EPYC Next Gen AMD processor, Codenammened Venice is the first HPC product used by the TSMC Node node, but I wonder if Apple was first there




  • AMD shows its first Venice Troquel of 2 Nm built with TSMC node node
  • Venice, based on Zen 6, is aimed at high performance computer workloads
  • AMD and TSMC hope to deepen their collaboration for future innovations

AMD has announced that the first 2 NM class silicon has produced successfully for its next -generation EPYC processor, the “Venice” code name that is expected to be launched in 2026 as part of the EPYC alignment of Sixth Gene Generation of AMD.

The Core Complex Die (CCD) is the first high performance computer product that has been recorded and mentioned using the Advanced TSMC N2 technology.

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