- Kioxia develops high-density 3D DRAM using stackable oxide semiconductor transistors
- Eight-Layer Transistor Stacks Show Reliable Operation in Lab Demonstrations
- InGaZnO oxide semiconductor replaces silicon nitride for the formation of vertical and horizontal transistors
Kioxia says it has developed highly stackable oxide semiconductor channel transistors capable of supporting high-density 3D DRAM.
This development could lead to cheaper and faster memory by reducing manufacturing costs per gigabyte and improving power efficiency through high-current and ultra-low-out-of-current transistors.
However, this technology requires precise alignment of multiple layers, integration into standard manufacturing, and long-term reliability testing, all of which can take decades.
Innovations in transistor design.
Presented at the recent IEEE International Electronic Devices Meeting in San Francisco, the technology demonstrated the operation of transistors stacked in eight vertical layers.
The vertical layers consist of horizontally aligned transistors formed by replacing conventional silicon nitride regions with an oxide semiconductor material, InGaZnO.
This arrangement allows for greater memory capacity without relying on conventional planar DRAM structures.
Oxide semiconductor channel transistors combine mature silicon oxide and silicon nitride films with the new InGaZnO material.
The 3D memory cell structure introduced by Kioxia scales the vertical pitch, allowing more memory cells to be stacked per unit volume.
The horizontal transistors formed in this process exhibit high current exceeding 30 microampere.
It also displays an ultra-low shutdown current below 1 attoampere, thereby minimizing power usage during refresh cycles.
By reducing refresh power, the design addresses a major limitation of traditional DRAM, where power consumption increases with higher memory densities.
Replacing monocrystalline silicon with oxide semiconductors reduces both complexity and power requirements in manufacturing.
These improvements reduce the cost of manufacturing DRAM per gigabyte, although retail prices for end users are not expected to decrease anytime soon.
The stacked transistor approach also targets applications that require high memory density with low power consumption, such as AI servers and IoT devices.
The improved efficiency could support processing larger data sets without the same proportional increase in power demand seen in conventional DRAM systems.
Despite these technical advances, transitioning the technology from laboratory demonstrations to mass production presents significant challenges.
Accurately aligning multiple layers, integrating oxide semiconductor materials into standard production lines, and ensuring long-term reliability remain obstacles to commercialization.
The company plans to continue research and development to enable practical implementation of 3D DRAM in real-world applications.
Although the technology shows clear technical advantages in energy efficiency, density and manufacturing feasibility, it will likely not reach consumer markets until the next decade.
That said, cheaper manufacturing per gigabyte does not guarantee lower retail prices, and adoption at scale will require overcoming both production and supply chain issues.
Via TechPowerUp
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